Ever increasing demand for computing power raises the need on one hand for more densely fabricated logic circuitry and on the other hand for more flexibility in fabricating the circuitry's operational architecture. In the U.S. Pat. Nos. 5,623,160, 5,691,209 & 6,506,981 all of the same as this inventor, densely arrayed conductive pillars with selectable connect able and disconnect able horizontal conductive leads are described and claimed to provide a well known Multi Chip Module (MCM) configuration for dense and fuse programmable three dimensional conductive connections within the MCM. It would be desirable to have such MCM configuration similarly inventively extended to make suitable similar to well known Field Programmable Gate Arrays (FPGA) but with its logic circuitry highly dense three dimensionally fabricated and three dimensionally fuse programmable. The present invention addresses this need.
Concentrically structured transistors have gained increasing attention for their switching efficiency and small footprint. Nevertheless, in order to extend logic circuitry from planar into full three dimensional architectures, there exists a need to provide transistor pillars of stacked multiple discrete transistors. The present invention addresses also this need.